1. Field of the Invention
The present invention relates to a method, system, and program for transferring data directed to virtual memory addresses to a device memory.
2. Description of the Related Art
A processor performs operations with respect to a fast-access local memory, such as loading operands from the local memory to processor registers to use with instructions being executed and storing operands from the processor registers to the local memory. Local memory address ranges may map to device memory address ranges, where the processor communicates with the device memory over an Input/Output (Bus), such as a Peripheral Component Interconnect (PCI) bus. A Memory Mapped Input Output (MMIO) component within the processor processes store operations to virtual memory addresses that map to local memory or to device memory addresses by generating an I/O bus transaction to transfer the data directed to a virtual address to the corresponding location in the device memory. In this way, the device memory addresses appear to the processor as local memory addresses.
To improve the performance of store operations to virtual addresses that are transferred over the I/O bus to device memory, the MMIO component may aggregate/gather multiple store operations to contiguous device memory addresses into a single burst transaction over the I/O bus to improve the performance of the transfer of data to the device memory addresses over the bus. However, many devices, such as adaptors and legacy devices, do not support I/O burst transactions to device registers in the device memory. Thus, if the MMIO component supports store gathering, store gathering would not work with devices that do not support I/O burst transactions to device registers. One solution to this compatibility issue is to have the programmer add barrier instructions between those store operations to the device registers to require that each store operation be processed individually and not aggregated. Another solution is to disable store gathering in the MMIO component to avoid burst transactions to the device registers over the I/O bus.